Server IP : 127.0.1.1 / Your IP : 216.73.216.172 Web Server : Apache/2.4.52 (Ubuntu) System : Linux bahcrestlinepropertiesllc 5.15.0-113-generic #123-Ubuntu SMP Mon Jun 10 08:16:17 UTC 2024 x86_64 User : www-data ( 33) PHP Version : 7.4.33 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /proc/1648833/cwd/lib/modules/5.15.0-153-generic/build/include/dt-bindings/clock/ |
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/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2013 Horms Solutions Ltd. * * Contact: Simon Horman <horms@verge.net.au> */ #ifndef __DT_BINDINGS_CLOCK_R8A7779_H__ #define __DT_BINDINGS_CLOCK_R8A7779_H__ /* CPG */ #define R8A7779_CLK_PLLA 0 #define R8A7779_CLK_Z 1 #define R8A7779_CLK_ZS 2 #define R8A7779_CLK_S 3 #define R8A7779_CLK_S1 4 #define R8A7779_CLK_P 5 #define R8A7779_CLK_B 6 #define R8A7779_CLK_OUT 7 /* MSTP 0 */ #define R8A7779_CLK_HSPI 7 #define R8A7779_CLK_TMU2 14 #define R8A7779_CLK_TMU1 15 #define R8A7779_CLK_TMU0 16 #define R8A7779_CLK_HSCIF1 18 #define R8A7779_CLK_HSCIF0 19 #define R8A7779_CLK_SCIF5 21 #define R8A7779_CLK_SCIF4 22 #define R8A7779_CLK_SCIF3 23 #define R8A7779_CLK_SCIF2 24 #define R8A7779_CLK_SCIF1 25 #define R8A7779_CLK_SCIF0 26 #define R8A7779_CLK_I2C3 27 #define R8A7779_CLK_I2C2 28 #define R8A7779_CLK_I2C1 29 #define R8A7779_CLK_I2C0 30 /* MSTP 1 */ #define R8A7779_CLK_USB01 0 #define R8A7779_CLK_USB2 1 #define R8A7779_CLK_DU 3 #define R8A7779_CLK_VIN2 8 #define R8A7779_CLK_VIN1 9 #define R8A7779_CLK_VIN0 10 #define R8A7779_CLK_ETHER 14 #define R8A7779_CLK_SATA 15 #define R8A7779_CLK_PCIE 16 #define R8A7779_CLK_VIN3 20 /* MSTP 3 */ #define R8A7779_CLK_SDHI3 20 #define R8A7779_CLK_SDHI2 21 #define R8A7779_CLK_SDHI1 22 #define R8A7779_CLK_SDHI0 23 #define R8A7779_CLK_MMC1 30 #define R8A7779_CLK_MMC0 31 #endif /* __DT_BINDINGS_CLOCK_R8A7779_H__ */