| Server IP : 127.0.1.1 / Your IP : 216.73.216.172 Web Server : Apache/2.4.52 (Ubuntu) System : Linux bahcrestlinepropertiesllc 5.15.0-113-generic #123-Ubuntu SMP Mon Jun 10 08:16:17 UTC 2024 x86_64 User : www-data ( 33) PHP Version : 7.4.33 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /proc/1648833/root/lib/modules/5.15.0-113-generic/build/include/dt-bindings/reset/ |
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/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2017 Impinj, Inc. * * Author: Andrey Smirnov <andrew.smirnov@gmail.com> */ #ifndef DT_BINDING_RESET_IMX7_H #define DT_BINDING_RESET_IMX7_H #define IMX7_RESET_A7_CORE_POR_RESET0 0 #define IMX7_RESET_A7_CORE_POR_RESET1 1 #define IMX7_RESET_A7_CORE_RESET0 2 #define IMX7_RESET_A7_CORE_RESET1 3 #define IMX7_RESET_A7_DBG_RESET0 4 #define IMX7_RESET_A7_DBG_RESET1 5 #define IMX7_RESET_A7_ETM_RESET0 6 #define IMX7_RESET_A7_ETM_RESET1 7 #define IMX7_RESET_A7_SOC_DBG_RESET 8 #define IMX7_RESET_A7_L2RESET 9 #define IMX7_RESET_SW_M4C_RST 10 #define IMX7_RESET_SW_M4P_RST 11 #define IMX7_RESET_EIM_RST 12 #define IMX7_RESET_HSICPHY_PORT_RST 13 #define IMX7_RESET_USBPHY1_POR 14 #define IMX7_RESET_USBPHY1_PORT_RST 15 #define IMX7_RESET_USBPHY2_POR 16 #define IMX7_RESET_USBPHY2_PORT_RST 17 #define IMX7_RESET_MIPI_PHY_MRST 18 #define IMX7_RESET_MIPI_PHY_SRST 19 /* * IMX7_RESET_PCIEPHY is a logical reset line combining PCIEPHY_BTN * and PCIEPHY_G_RST */ #define IMX7_RESET_PCIEPHY 20 #define IMX7_RESET_PCIEPHY_PERST 21 /* * IMX7_RESET_PCIE_CTRL_APPS_EN is not strictly a reset line, but it * can be used to inhibit PCIe LTTSM, so, in a way, it can be thoguht * of as one */ #define IMX7_RESET_PCIE_CTRL_APPS_EN 22 #define IMX7_RESET_DDRC_PRST 23 #define IMX7_RESET_DDRC_CORE_RST 24 #define IMX7_RESET_PCIE_CTRL_APPS_TURNOFF 25 #define IMX7_RESET_NUM 26 #endif