| Server IP : 127.0.1.1 / Your IP : 216.73.216.172 Web Server : Apache/2.4.52 (Ubuntu) System : Linux bahcrestlinepropertiesllc 5.15.0-113-generic #123-Ubuntu SMP Mon Jun 10 08:16:17 UTC 2024 x86_64 User : www-data ( 33) PHP Version : 7.4.33 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /proc/self/root/lib/modules/5.15.0-113-generic/build/include/dt-bindings/clock/ |
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/* SPDX-License-Identifier: GPL-2.0 */ /* * This header provides constants clk index STMicroelectronics * STiH418 SoC. */ #ifndef _DT_BINDINGS_CLK_STIH418 #define _DT_BINDINGS_CLK_STIH418 #include "stih410-clks.h" /* STiH418 introduces new clock outputs compared to STiH410 */ /* CLOCKGEN C0 */ #define CLK_PROC_BDISP_0 14 #define CLK_PROC_BDISP_1 15 #define CLK_TX_ICN_1 23 #define CLK_ETH_PHYREF 27 #define CLK_PP_HEVC 35 #define CLK_CLUST_HEVC 36 #define CLK_HWPE_HEVC 37 #define CLK_FC_HEVC 38 #define CLK_PROC_MIXER 39 #define CLK_PROC_SC 40 #define CLK_AVSP_HEVC 41 /* CLOCKGEN D2 */ #undef CLK_PIX_PIP #undef CLK_PIX_GDP1 #undef CLK_PIX_GDP2 #undef CLK_PIX_GDP3 #undef CLK_PIX_GDP4 #define CLK_TMDS_HDMI_DIV2 5 #define CLK_VP9 47 #endif