| Server IP : 127.0.1.1 / Your IP : 216.73.216.172 Web Server : Apache/2.4.52 (Ubuntu) System : Linux bahcrestlinepropertiesllc 5.15.0-113-generic #123-Ubuntu SMP Mon Jun 10 08:16:17 UTC 2024 x86_64 User : www-data ( 33) PHP Version : 7.4.33 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /proc/self/root/lib/modules/5.15.0-113-generic/build/include/dt-bindings/gpio/ |
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/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. */ /* * This header provides constants for binding nvidia,tegra194-gpio*. * * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below * provide names for this. * * The second cell contains standard flag values specified in gpio.h. */ #ifndef _DT_BINDINGS_GPIO_TEGRA194_GPIO_H #define _DT_BINDINGS_GPIO_TEGRA194_GPIO_H #include <dt-bindings/gpio/gpio.h> /* GPIOs implemented by main GPIO controller */ #define TEGRA194_MAIN_GPIO_PORT_A 0 #define TEGRA194_MAIN_GPIO_PORT_B 1 #define TEGRA194_MAIN_GPIO_PORT_C 2 #define TEGRA194_MAIN_GPIO_PORT_D 3 #define TEGRA194_MAIN_GPIO_PORT_E 4 #define TEGRA194_MAIN_GPIO_PORT_F 5 #define TEGRA194_MAIN_GPIO_PORT_G 6 #define TEGRA194_MAIN_GPIO_PORT_H 7 #define TEGRA194_MAIN_GPIO_PORT_I 8 #define TEGRA194_MAIN_GPIO_PORT_J 9 #define TEGRA194_MAIN_GPIO_PORT_K 10 #define TEGRA194_MAIN_GPIO_PORT_L 11 #define TEGRA194_MAIN_GPIO_PORT_M 12 #define TEGRA194_MAIN_GPIO_PORT_N 13 #define TEGRA194_MAIN_GPIO_PORT_O 14 #define TEGRA194_MAIN_GPIO_PORT_P 15 #define TEGRA194_MAIN_GPIO_PORT_Q 16 #define TEGRA194_MAIN_GPIO_PORT_R 17 #define TEGRA194_MAIN_GPIO_PORT_S 18 #define TEGRA194_MAIN_GPIO_PORT_T 19 #define TEGRA194_MAIN_GPIO_PORT_U 20 #define TEGRA194_MAIN_GPIO_PORT_V 21 #define TEGRA194_MAIN_GPIO_PORT_W 22 #define TEGRA194_MAIN_GPIO_PORT_X 23 #define TEGRA194_MAIN_GPIO_PORT_Y 24 #define TEGRA194_MAIN_GPIO_PORT_Z 25 #define TEGRA194_MAIN_GPIO_PORT_FF 26 #define TEGRA194_MAIN_GPIO_PORT_GG 27 #define TEGRA194_MAIN_GPIO(port, offset) \ ((TEGRA194_MAIN_GPIO_PORT_##port * 8) + offset) /* GPIOs implemented by AON GPIO controller */ #define TEGRA194_AON_GPIO_PORT_AA 0 #define TEGRA194_AON_GPIO_PORT_BB 1 #define TEGRA194_AON_GPIO_PORT_CC 2 #define TEGRA194_AON_GPIO_PORT_DD 3 #define TEGRA194_AON_GPIO_PORT_EE 4 #define TEGRA194_AON_GPIO(port, offset) \ ((TEGRA194_AON_GPIO_PORT_##port * 8) + offset) #endif