Server IP : 127.0.1.1 / Your IP : 216.73.216.172 Web Server : Apache/2.4.52 (Ubuntu) System : Linux bahcrestlinepropertiesllc 5.15.0-113-generic #123-Ubuntu SMP Mon Jun 10 08:16:17 UTC 2024 x86_64 User : www-data ( 33) PHP Version : 7.4.33 Disable Function : pcntl_alarm,pcntl_fork,pcntl_waitpid,pcntl_wait,pcntl_wifexited,pcntl_wifstopped,pcntl_wifsignaled,pcntl_wifcontinued,pcntl_wexitstatus,pcntl_wtermsig,pcntl_wstopsig,pcntl_signal,pcntl_signal_get_handler,pcntl_signal_dispatch,pcntl_get_last_error,pcntl_strerror,pcntl_sigprocmask,pcntl_sigwaitinfo,pcntl_sigtimedwait,pcntl_exec,pcntl_getpriority,pcntl_setpriority,pcntl_async_signals,pcntl_unshare, MySQL : OFF | cURL : ON | WGET : ON | Perl : ON | Python : OFF | Sudo : ON | Pkexec : ON Directory : /usr/src/linux-headers-5.15.0-113/arch/xtensa/platforms/xt2000/include/platform/ |
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/* * platform/hardware.h * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2001 Tensilica Inc. */ /* * This file contains the hardware configuration of the XT2000 board. */ #ifndef _XTENSA_XT2000_HARDWARE_H #define _XTENSA_XT2000_HARDWARE_H #include <asm/core.h> /* * On-board components. */ #define SONIC83934_INTNUM XCHAL_EXTINT3_NUM #define SONIC83934_ADDR IOADDR(0x0d030000) /* * V3-PCI */ /* The XT2000 uses the V3 as a cascaded interrupt controller for the PCI bus */ #define IRQ_PCI_A (XCHAL_NUM_INTERRUPTS + 0) #define IRQ_PCI_B (XCHAL_NUM_INTERRUPTS + 1) #define IRQ_PCI_C (XCHAL_NUM_INTERRUPTS + 2) /* * Various other components. */ #define XT2000_LED_ADDR IOADDR(0x0d040000) #endif /* _XTENSA_XT2000_HARDWARE_H */